Fulguro: /home/christophe/src/fulguro/trunk/src/arith/flgrArithSSE2.c Source File

00001 /****************************************************************
00002  * Fulguro
00003  * Copyright (C) 2004 Christophe Clienti
00004  *
00005  * This library is free software; you can redistribute it and/or
00006  * modify it under the terms of the GNU Lesser General Public
00007  * License as published by the Free Software Foundation; either
00008  * version 2 of the License, or (at your option) any later version.
00009  *
00010  * This library is distributed in the hope that it will be useful,
00011  * but WITHOUT ANY WARRANTY; without even the implied warranty of
00012  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
00013  * Lesser General Public License for more details.
00014  *
00015  * You should have received a copy of the GNU Lesser General Public
00016  * License along with this library; if not, write to the
00017  * Free Software Foundation, Inc., 59 Temple Place - Suite 330,
00018  * Boston, MA 02111-1307, USA.
00019  ***************************************************************/
00020 
00021 #include <string.h>
00022 #include <flgrCoreVector.h>
00023 #include <flgrCoreDispatch.h>
00024 
00025 #ifdef __SSE2__
00026 #include <xmmintrin.h>
00027 #include <emmintrin.h>
00028 #endif
00029 
00030 #include "flgrArithSSE2.h"
00031 
00032 #define FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(instr,vtype,dtype,set_vec_const) \
00033   vtype r1,r2;                              \
00034   vtype *psrc1 = (vtype*) data1->array;                 \
00035   vtype *pdest = (vtype*) datdest->array;               \
00036   int j,c = (sizeof(vtype)*8)/data1->bps;               \
00037                                     \
00038                         \
00039                                     \
00040   r2=set_vec_const(*((dtype*) (vec_const->array)));         \
00041                                     \
00042   for(j=0;j<datdest->length;j+=c) {                 \
00043     r1 = _mm_load_si128(psrc1);                     \
00044     r1 = instr(r1,r2);                          \
00045     _mm_store_si128(pdest,r1);                      \
00046                                     \
00047     pdest++;psrc1++;                            \
00048   }                                 \
00049                                     \
00050   return
00051 
00052 
00053 #define FLGR_MACRO_ARITH_1D_DIADIC_SSE2(instr,vtype)    \
00054   vtype r1,r2;                      \
00055   vtype *psrc1 = (vtype*) data1->array;         \
00056   vtype *psrc2 = (vtype*) data2->array;         \
00057   vtype *pdest = (vtype*) datdest->array;       \
00058   int j,c = (sizeof(vtype)*8)/data1->bps;       \
00059   int length = datdest->length*datdest->spp;        \
00060                             \
00061                 \
00062                             \
00063   for(j=0;j<length;j+=c) {              \
00064     r1 = _mm_load_si128(psrc1);             \
00065     r2 = _mm_load_si128(psrc2);             \
00066     r1 = instr(r1,r2);                  \
00067     _mm_store_si128(pdest,r1);              \
00068                             \
00069     pdest++;psrc1++;psrc2++;                \
00070   }                         \
00071                             \
00072   return
00073 
00074 
00075 
00076 
00077 void flgr1d_arith_inf_SSE2_fgBIT(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00078 #ifdef __SSE2__
00079   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_and_si128,__m128i);
00080 #endif
00081 }
00082 void flgr1d_arith_inf_SSE2_fgUINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00083 #ifdef __SSE2__
00084   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_min_epu8,__m128i);
00085 #endif
00086 }
00087 void flgr1d_arith_inf_SSE2_fgINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00088 #ifdef __SSE2__
00089   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_min_epi16,__m128i);
00090 #endif
00091 }
00092 
00093 
00094 
00095 
00096 void flgr1d_arith_sup_SSE2_fgBIT(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00097 #ifdef __SSE2__
00098   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_or_si128,__m128i);
00099 #endif
00100 }
00101 void flgr1d_arith_sup_SSE2_fgUINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00102 #ifdef __SSE2__
00103   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_max_epu8,__m128i);
00104 #endif
00105 }
00106 void flgr1d_arith_sup_SSE2_fgINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00107 #ifdef __SSE2__
00108   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_max_epi16,__m128i);
00109 #endif
00110 }
00111 
00112 
00113 
00114 void flgr1d_arith_and_SSE2_fgBIT(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00115 #ifdef __SSE2__
00116   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_and_si128,__m128i);
00117 #endif
00118 }
00119 void flgr1d_arith_and_SSE2_fgUINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00120 #ifdef __SSE2__
00121   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_and_si128,__m128i);
00122 #endif
00123 }
00124 void flgr1d_arith_and_SSE2_fgUINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00125 #ifdef __SSE2__
00126   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_and_si128,__m128i);
00127 #endif
00128 }
00129 void flgr1d_arith_and_SSE2_fgUINT32(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00130 #ifdef __SSE2__
00131   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_and_si128,__m128i);
00132 #endif
00133 }
00134 void flgr1d_arith_and_SSE2_fgINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00135 #ifdef __SSE2__
00136   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_and_si128,__m128i);
00137 #endif
00138 }
00139 void flgr1d_arith_and_SSE2_fgINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00140 #ifdef __SSE2__
00141   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_and_si128,__m128i);
00142 #endif
00143 }
00144 void flgr1d_arith_and_SSE2_fgINT32(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00145 #ifdef __SSE2__
00146   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_and_si128,__m128i);
00147 #endif
00148 }
00149 
00150 
00151 
00152 void flgr1d_arith_or_SSE2_fgBIT(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00153 #ifdef __SSE2__
00154   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_or_si128,__m128i);
00155 #endif
00156 }
00157 void flgr1d_arith_or_SSE2_fgUINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00158 #ifdef __SSE2__
00159   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_or_si128,__m128i);
00160 #endif
00161 }
00162 void flgr1d_arith_or_SSE2_fgUINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00163 #ifdef __SSE2__
00164   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_or_si128,__m128i);
00165 #endif
00166 }
00167 void flgr1d_arith_or_SSE2_fgUINT32(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00168 #ifdef __SSE2__
00169   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_or_si128,__m128i);
00170 #endif
00171 }
00172 void flgr1d_arith_or_SSE2_fgINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00173 #ifdef __SSE2__
00174   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_or_si128,__m128i);
00175 #endif
00176 }
00177 void flgr1d_arith_or_SSE2_fgINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00178 #ifdef __SSE2__
00179   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_or_si128,__m128i);
00180 #endif
00181 }
00182 void flgr1d_arith_or_SSE2_fgINT32(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00183 #ifdef __SSE2__
00184   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_or_si128,__m128i);
00185 #endif
00186 }
00187 
00188 
00189 
00190 void flgr1d_arith_xor_SSE2_fgBIT(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00191 #ifdef __SSE2__
00192   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_xor_si128,__m128i);
00193 #endif
00194 }
00195 void flgr1d_arith_xor_SSE2_fgUINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00196 #ifdef __SSE2__
00197   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_xor_si128,__m128i);
00198 #endif
00199 }
00200 void flgr1d_arith_xor_SSE2_fgUINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00201 #ifdef __SSE2__
00202   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_xor_si128,__m128i);
00203 #endif
00204 }
00205 void flgr1d_arith_xor_SSE2_fgUINT32(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00206 #ifdef __SSE2__
00207   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_xor_si128,__m128i);
00208 #endif
00209 }
00210 void flgr1d_arith_xor_SSE2_fgINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00211 #ifdef __SSE2__
00212   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_xor_si128,__m128i);
00213 #endif
00214 }
00215 void flgr1d_arith_xor_SSE2_fgINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00216 #ifdef __SSE2__
00217   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_xor_si128,__m128i);
00218 #endif
00219 }
00220 void flgr1d_arith_xor_SSE2_fgINT32(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00221 #ifdef __SSE2__
00222   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_xor_si128,__m128i);
00223 #endif
00224 }
00225 
00226 
00227 
00228 void flgr1d_arith_add_SSE2_fgBIT(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00229 #ifdef __SSE2__
00230   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_xor_si128,__m128i);
00231 #endif
00232 }
00233 void flgr1d_arith_add_SSE2_fgUINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00234 #ifdef __SSE2__
00235   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_add_epi8,__m128i);
00236 #endif
00237 }
00238 void flgr1d_arith_add_SSE2_fgUINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00239 #ifdef __SSE2__
00240   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_add_epi16,__m128i);
00241 #endif
00242 }
00243 void flgr1d_arith_add_SSE2_fgINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00244 #ifdef __SSE2__
00245   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_add_epi8,__m128i);
00246 #endif
00247 }
00248 void flgr1d_arith_add_SSE2_fgINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00249 #ifdef __SSE2__
00250   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_add_epi16,__m128i);
00251 #endif
00252 }
00253 
00254 
00255 
00256 void flgr1d_arith_addsat_SSE2_fgUINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00257 #ifdef __SSE2__
00258   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_adds_epu8,__m128i);
00259 #endif
00260 }
00261 void flgr1d_arith_addsat_SSE2_fgUINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00262 #ifdef __SSE2__
00263   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_adds_epu16,__m128i);
00264 #endif
00265 }
00266 void flgr1d_arith_addsat_SSE2_fgINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00267 #ifdef __SSE2__
00268   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_adds_epi16,__m128i);
00269 #endif
00270 }
00271 
00272 
00273 
00274 void flgr1d_arith_sub_SSE2_fgBIT(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00275 #ifdef __SSE2__
00276   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_xor_si128,__m128i);
00277 #endif
00278 }
00279 void flgr1d_arith_sub_SSE2_fgUINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00280 #ifdef __SSE2__
00281   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_sub_epi8,__m128i);
00282 #endif
00283 }
00284 void flgr1d_arith_sub_SSE2_fgUINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00285 #ifdef __SSE2__
00286   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_sub_epi16,__m128i);
00287 #endif
00288 }
00289 void flgr1d_arith_sub_SSE2_fgINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00290 #ifdef __SSE2__
00291   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_sub_epi8,__m128i);
00292 #endif
00293 }
00294 void flgr1d_arith_sub_SSE2_fgINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00295 #ifdef __SSE2__
00296   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_sub_epi16,__m128i);
00297 #endif
00298 }
00299 
00300 
00301 
00302 void flgr1d_arith_subsat_SSE2_fgUINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00303 #ifdef __SSE2__
00304   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_subs_epu8,__m128i);
00305 #endif
00306 }
00307 void flgr1d_arith_subsat_SSE2_fgUINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00308 #ifdef __SSE2__
00309   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_subs_epu16,__m128i);
00310 #endif
00311 }
00312 void flgr1d_arith_subsat_SSE2_fgINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Data1D *data2) {
00313 #ifdef __SSE2__
00314   FLGR_MACRO_ARITH_1D_DIADIC_SSE2(_mm_subs_epi16,__m128i);
00315 #endif
00316 }
00317 
00318 
00319 
00320 
00321 
00322 
00323 
00324 void flgr1d_arith_const_inf_spp1_SSE2_fgUINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00325 #ifdef __SSE2__
00326   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_min_epu8,__m128i,fgUINT8,_mm_set1_epi8);
00327 #endif
00328 }
00329 void flgr1d_arith_const_inf_spp1_SSE2_fgINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00330 #ifdef __SSE2__
00331   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_min_epi16,__m128i,fgINT16,_mm_set1_epi16);
00332 #endif
00333 }
00334 
00335 
00336 
00337 void flgr1d_arith_const_sup_spp1_SSE2_fgUINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00338 #ifdef __SSE2__
00339   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_max_epu8,__m128i,fgUINT8,_mm_set1_epi8);
00340 #endif
00341 }
00342 void flgr1d_arith_const_sup_spp1_SSE2_fgINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00343 #ifdef __SSE2__
00344   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_max_epi16,__m128i,fgINT16,_mm_set1_epi16);
00345 #endif
00346 }
00347 
00348 
00349 
00350 
00351 void flgr1d_arith_const_and_spp1_SSE2_fgUINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00352 #ifdef __SSE2__
00353   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_and_si128,__m128i,fgUINT8,_mm_set1_epi8);
00354 #endif
00355 }
00356 void flgr1d_arith_const_and_spp1_SSE2_fgUINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00357 #ifdef __SSE2__
00358   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_and_si128,__m128i,fgUINT16,_mm_set1_epi16);
00359 #endif
00360 }
00361 void flgr1d_arith_const_and_spp1_SSE2_fgUINT32(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00362 #ifdef __SSE2__
00363   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_and_si128,__m128i,fgUINT32,_mm_set1_epi32);
00364 #endif
00365 }
00366 void flgr1d_arith_const_and_spp1_SSE2_fgINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00367 #ifdef __SSE2__
00368   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_and_si128,__m128i,fgINT8,_mm_set1_epi8);
00369 #endif
00370 }
00371 void flgr1d_arith_const_and_spp1_SSE2_fgINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00372 #ifdef __SSE2__
00373   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_and_si128,__m128i,fgINT16,_mm_set1_epi16);
00374 #endif
00375 }
00376 void flgr1d_arith_const_and_spp1_SSE2_fgINT32(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00377 #ifdef __SSE2__
00378   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_and_si128,__m128i,fgINT32,_mm_set1_epi32);
00379 #endif
00380 }
00381 
00382 
00383 
00384 
00385 void flgr1d_arith_const_or_spp1_SSE2_fgUINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00386 #ifdef __SSE2__
00387   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_or_si128,__m128i,fgUINT8,_mm_set1_epi8);
00388 #endif
00389 }
00390 void flgr1d_arith_const_or_spp1_SSE2_fgUINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00391 #ifdef __SSE2__
00392   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_or_si128,__m128i,fgUINT16,_mm_set1_epi16);
00393 #endif
00394 }
00395 void flgr1d_arith_const_or_spp1_SSE2_fgUINT32(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00396 #ifdef __SSE2__
00397   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_or_si128,__m128i,fgUINT32,_mm_set1_epi32);
00398 #endif
00399 }
00400 void flgr1d_arith_const_or_spp1_SSE2_fgINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00401 #ifdef __SSE2__
00402   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_or_si128,__m128i,fgINT8,_mm_set1_epi8);
00403 #endif
00404 }
00405 void flgr1d_arith_const_or_spp1_SSE2_fgINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00406 #ifdef __SSE2__
00407   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_or_si128,__m128i,fgINT16,_mm_set1_epi16);
00408 #endif
00409 }
00410 void flgr1d_arith_const_or_spp1_SSE2_fgINT32(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00411 #ifdef __SSE2__
00412   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_or_si128,__m128i,fgINT32,_mm_set1_epi32);
00413 #endif
00414 }
00415 
00416 
00417 
00418 
00419 void flgr1d_arith_const_xor_spp1_SSE2_fgUINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00420 #ifdef __SSE2__
00421   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_xor_si128,__m128i,fgUINT8,_mm_set1_epi8);
00422 #endif
00423 }
00424 void flgr1d_arith_const_xor_spp1_SSE2_fgUINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00425 #ifdef __SSE2__
00426   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_xor_si128,__m128i,fgUINT16,_mm_set1_epi16);
00427 #endif
00428 }
00429 void flgr1d_arith_const_xor_spp1_SSE2_fgUINT32(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00430 #ifdef __SSE2__
00431   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_xor_si128,__m128i,fgUINT32,_mm_set1_epi32);
00432 #endif
00433 }
00434 void flgr1d_arith_const_xor_spp1_SSE2_fgINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00435 #ifdef __SSE2__
00436   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_xor_si128,__m128i,fgINT8,_mm_set1_epi8);
00437 #endif
00438 }
00439 void flgr1d_arith_const_xor_spp1_SSE2_fgINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00440 #ifdef __SSE2__
00441   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_xor_si128,__m128i,fgINT16,_mm_set1_epi16);
00442 #endif
00443 }
00444 void flgr1d_arith_const_xor_spp1_SSE2_fgINT32(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00445 #ifdef __SSE2__
00446   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_xor_si128,__m128i,fgINT32,_mm_set1_epi32);
00447 #endif
00448 }
00449 
00450 
00451 
00452 
00453 void flgr1d_arith_const_add_spp1_SSE2_fgUINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00454 #ifdef __SSE2__
00455   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_add_epi8,__m128i,fgUINT8,_mm_set1_epi8);
00456 #endif
00457 }
00458 void flgr1d_arith_const_add_spp1_SSE2_fgUINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00459 #ifdef __SSE2__
00460   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_add_epi16,__m128i,fgUINT16,_mm_set1_epi16);
00461 #endif
00462 }
00463 void flgr1d_arith_const_add_spp1_SSE2_fgINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00464 #ifdef __SSE2__
00465   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_add_epi8,__m128i,fgINT8,_mm_set1_epi8);
00466 #endif
00467 }
00468 void flgr1d_arith_const_add_spp1_SSE2_fgINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00469 #ifdef __SSE2__
00470   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_add_epi16,__m128i,fgINT16,_mm_set1_epi16);
00471 #endif
00472 }
00473 
00474 
00475 
00476 
00477 void flgr1d_arith_const_addsat_spp1_SSE2_fgUINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00478 #ifdef __SSE2__
00479   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_adds_epu8,__m128i,fgUINT8,_mm_set1_epi8);
00480 #endif
00481 }
00482 void flgr1d_arith_const_addsat_spp1_SSE2_fgUINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00483 #ifdef __SSE2__
00484   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_adds_epu16,__m128i,fgUINT16,_mm_set1_epi16);
00485 #endif
00486 }
00487 void flgr1d_arith_const_addsat_spp1_SSE2_fgINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00488 #ifdef __SSE2__
00489   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_adds_epi16,__m128i,fgINT16,_mm_set1_epi16);
00490 #endif
00491 }
00492 
00493 
00494 
00495 
00496 void flgr1d_arith_const_sub_spp1_SSE2_fgUINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00497 #ifdef __SSE2__
00498   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_sub_epi8,__m128i,fgUINT8,_mm_set1_epi8);
00499 #endif
00500 }
00501 void flgr1d_arith_const_sub_spp1_SSE2_fgUINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00502 #ifdef __SSE2__
00503   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_sub_epi16,__m128i,fgUINT16,_mm_set1_epi16);
00504 #endif
00505 }
00506 void flgr1d_arith_const_sub_spp1_SSE2_fgINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00507 #ifdef __SSE2__
00508   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_sub_epi8,__m128i,fgINT8,_mm_set1_epi8);
00509 #endif
00510 }
00511 void flgr1d_arith_const_sub_spp1_SSE2_fgINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00512 #ifdef __SSE2__
00513   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_sub_epi16,__m128i,fgINT16,_mm_set1_epi16);
00514 #endif
00515 }
00516 
00517 
00518 
00519 
00520 void flgr1d_arith_const_subsat_spp1_SSE2_fgUINT8(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00521 #ifdef __SSE2__
00522   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_subs_epu8,__m128i,fgUINT8,_mm_set1_epi8);
00523 #endif
00524 }
00525 void flgr1d_arith_const_subsat_spp1_SSE2_fgUINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00526 #ifdef __SSE2__
00527   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_subs_epu16,__m128i,fgUINT16,_mm_set1_epi16);
00528 #endif
00529 }
00530 void flgr1d_arith_const_subsat_spp1_SSE2_fgINT16(FLGR_Data1D *datdest, FLGR_Data1D *data1, FLGR_Vector *vec_const) {
00531 #ifdef __SSE2__
00532   FLGR_MACRO_ARITH_1D_DIADIC_CONST_SPP1_SSE2(_mm_subs_epi16,__m128i,fgINT16,_mm_set1_epi16);
00533 #endif
00534 }